1. Fast Radix-10 Multiplication Using Redundant BCD Codes Download
2. Efficient Integer DCT Architectures for HEVC.Download
3. A parallel radix-sort-based VLSI architecture for finding the first W maximum/minimum values.Download
4. A Methodology for Optimized Design of Secure Differential Logic Gates for DPA Resistant
Circuits. Download
5. An Optimized Modified Booth Recoder for Efficient Design of the Add-Multiply Operator. Download
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